In the previous example, the inverter used no power at all. This example shows a more realistic model of an inverter, with parasitic capacitance between the source/drain and gate. Charging the capacitances takes current whenever the gate changes state. This takes time, and consumes power.

Next: CMOS Inverter (slow transition)
Previous: CMOS Inverter
Simulator Home
Generated Tue Jun 9 2015